You can also find my publications/articles on my Google Scholar profile.
Published in IEEE Xplore, 2021
Abstract: Hybrid Quantum-Classical (HQC) Architectures are used in near-term NISQ Quantum Computers for solving Quantum Machine Learning problems. The quantum advantage comes into picture due to the exponential speedup offered over classical computing. One of the major challenges in implementing such algorithms is the choice of quantum embeddings and the use of a functionally correct quantum variational circuit. In this paper, we present an application of QSVM (Quantum Support Vector Machines) to predict if a person will require mental health treatment in the future the tech world using the dataset from OSMI Mental Health Tech Surveys. We achieve this with non-classically simulable feature maps and prove that NISQ HQC Architectures for Quantum Machine Learning can be used alternatively to create good performance models in near-term real-world applications.
Published in IEEE Xplore, 2019
Abstract: A smart water management system is proposed in this paper to identify leakages and predict the location of leakages in pipelines. The system determines leakages by utilizing the flow rates of water in pipelines and predicts the location of the leakages by applying machine learning (ML) techniques. To predict the location of the leakages in the pipeline, different ML approaches have been developed and tested. A comparison of these models is performed to obtain the best model for location prediction. A prototype has been developed in STAR-CCM+, a Computational Fluid Dynamics (CFD) software, to test the proposed system. The results show that amongst the machine learning based location prediction models, the Multi-Layer Perceptron (MLP) performs the best with an accuracy of 94.47% and an F1 score of 0.95.
Published in IEEE Xplore, 2018
Abstract: Network on chip (NoC) is a communication subsystem on an IC, typically between intellectual property (IP) cores in a system on a chip (SoC). NoC helps to accomplish greater throughput in multi-core chips. Communication among the cores is established via routers interfaced to each core. The communication unit across the core are flits that pass through routers to reach the destination. It replaces dedicated point to point wiring between cores on a chip and increases scalability. But as the cores grow in number, the communication between two distantly placed cores becomes cumbersome. Proposed paper describes a technique called Adaptive WiNoC to reduce traffic at wireless routers by checking the buffer occupancy at the wireless routers, placing the flits in some other routers when the wireless routers are full and introducing output queue in the wireless router.